Abstract

Registers for serial communication.

UDRn

The UDRn is a buffer for transmit and receive data. Shares same address.

When a UDREn flag of UCSRnA is set, we can write data to transmit buffer.

UCSRnA

The UCSRnA(USART Control and Status Register n A) is a register to control serial communication and status.

RXCn(USART Receive Complete)

Set when unread data exists in receive buffer.

TXCn(USART Transmit Complete)

Set when untransmitted data dose not exist in transmit buffer.

UDREn(USART Data Register Empty)

Set when transmit buffer is ready to get data.

FEn(Frame Error)

Set when next character in the receive buffer has a frame error.

DORn(Data OverRun)

Set when detects data overrun. If the receive buffer is full and detect new start bit.

UPEn(USART Parity Error)

Set when next character in the receive buffer has a parity error.。

U2Xn(Double the USART Transmission Speed)

Effective for asynchronous operation mode. If write 1, set baud rate divider from 16 to 8, so transfer rate is doubling.

MPCMn(Multi-processor Communication Mode)

Enables the multi-processor communication mode.

UCSRnB

RXCIEn(RX Complete Interrupt Enable n)

Enables interrupt on the RXCn Flag.

TXCIEn(TX Complete Interrupt Enable n)

Enables interrupt on the TXCn Flag.

UDRIEn(USART Data Register Empty Interrupt Enable n)

Enables interrupt on the UDREn Flag.

RXENn(Receiver Enable n)

Enables the USART Receiver.

TXENn(Transmitter Enable n)

Enables the USART Transmitter.

UCSZn2(Character Size n), UCSZn1 and UCSZn0

Sets the number of data bits

RXB8n(Receive Data Bit 8 n)

The ninth data bit of the received character when 9 bit mode.

TXB8n(Transmit Data Bit 8 n)

The ninth data bit of the transmitting character when 9 bit mode.

UCSRnC

The UCSRnC(USART Control and Status Register n C) is a register for parity, stop bit and so on.

UMSELn

Sets the operation mode as below. The default is asynchronous USART.

UPMn

Enables and sets type of parity generation and check. The default is disabled.

USBSn

Selects the number of stop bits to be inserted by the transmitter. 1 bit when 0, 2 bit when 1. The default is 1 bit.

UCSZn2, UCSZn1, UCSZn0

Sets the length of data bit. The default is 8 bit.

UCPOLn

Sets the relationship between data output change and data input sample, and the synchronous clock (XCKn).

UBRRnL, UBRRnH

Sets the baud rate.

12 bit of the 16 bit is valid. The communication speed is calculated as below. The F_CPU is a system clock.

U2Xn = 0

BAUD = F_CPU / (16 (UBRRn + 1))

UBRRn = (F_CPU / (16 * BAUD)) - 1

U2Xn = 1

BAUD = F_CPU / 8 (UBRRn + 1)

UBRRn = (F_CPU / (8 * BAUD)) - 1

Version

Arduino AVR Boards 1.8.6

License

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/*
  Copyright (c) 2019 garretlab.
  Added source code explanation by garretlab.
*/

/*
  HardwareSerial.cpp - Hardware serial library for Wiring
  Copyright (c) 2006 Nicholas Zambetti.  All right reserved.

  This library is free software; you can redistribute it and/or
  modify it under the terms of the GNU Lesser General Public
  License as published by the Free Software Foundation; either
  version 2.1 of the License, or (at your option) any later version.

  This library is distributed in the hope that it will be useful,
  but WITHOUT ANY WARRANTY; without even the implied warranty of
  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  Lesser General Public License for more details.

  You should have received a copy of the GNU Lesser General Public
  License along with this library; if not, write to the Free Software
  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA

  Modified 23 November 2006 by David A. Mellis
  Modified 28 September 2010 by Mark Sproul
  Modified 14 August 2012 by Alarus
  Modified 3 December 2013 by Matthijs Kooijman
*/

Last Update

July 31, 2025